1. Technical Field
The present disclosure relates to a variable capacitance device, and to a method of fabricating a variable capacitance device.
2. Discussion of the Related Art
Variable capacitance devices are used in a variety of applications, such as in the tuning circuits of voltage control oscillators used in wireless communication systems. It is often an aim of such variable capacitance devices to have a very fine step size between each capacitance value. In particular, in some applications it is desirable to attain a step size as low as 1 aF (AttoFarad, equal to 10−18 Farads).
FIGS. 1A, 1B and 1C illustrate a solution that has been proposed, as described in U.S. patent application 2007/075791, these figures respectively reproducing FIGS. 3, 1b and 1a of that patent application.
A variable capacitor 100 of FIG. 1A comprises a pair of variable-capacitance components 1 and 2 coupled in parallel between terminals 12a and 12b. Component 1 receives, via a line 3, a control signal C1, which corresponds to a control signal C supplied to the variable capacitor 100. Component 2 receives a control signal C2, which corresponds to the control signal C, after inversion by an inverter 4. Thus, at any time, the variable-capacitance components 1 and 2 are controlled by opposite signals.
FIG. 1B illustrates the variable-capacitance component 1 in more detail. As illustrated, component 1 comprises varactors 10a and 10b, each receiving the control signal C1 on a line 11. Furthermore, terminals 13, 14a and 14b of the varactors, discussed in more detail below with reference to FIG. 1C, are coupled together. Component 2 is identical to component 1.
FIG. 1C illustrates in cross-section the varactor 1 in more detail. A lightly doped n-type well 102 is formed in a p-type semiconductor substrate 105, surrounded by an STI (Shadow Trench Isolation) 101. A central zone 103 and two lateral zones 104a, 104b situated in the well 102 are heavily doped n-type regions, these zones forming the terminals 13, 14a and 14b respectively of the varactor 1. A MOS gate is formed between the zones 104a and 103, and a further MOS gate is formed between the zones 103 and 104b. These gates respectively provide outputs to the terminals 12a and 12b of the device 100. The components 1 and 2 are differentiated by a configuration parameter, and thus, in operation, the respective variations in capacitance are different, leading to a variable capacitance of relatively low step size.
It would be desirable to provide a variable capacitance device having an even lower step size and/or an improved performance with respect to the circuits of the prior art.